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FinFET, Nano-Sheet Cell Design – Now & Road Ahead

A three day workshop on current trend of the FinFET and future technology of Nano-Sheet Cell Design was organized by Mr. Vinay Sharma, ni2design and was delivered by Dr. Etienne Sicard during 14th September 2022 to 16th September 2022. Dr. Etienne Sicard is a mentor and spirit behind the success of Microwind software. He is currently a professor at Department of Electrical and Computer Engineering, INSA of Toulouse. In this workshop we learnt about the tool Microwind software which is the EDA Software used for designing and simulating circuits at layout level which is highly used in VLSI Industry. The registration fee of this workshop was Rs 1000/- per participant. Prof. Amisha Naik coordinated for this workshop and convinced the organisers to waive off the registration fees for all 18 students of PG-VLSI Design Sem-I. Total 18 students and 01 faculty member attended the sessions on three consecutive days.

DAY 1: Introduction to Microwind and Hands-on overview

On the first day we discovered the journey of Microwind software over the times, learnt about a new version of Microwind 3.9, which supports Nano-Sheet transistors too; we got some hands-on practice for Microwind software so that we can carry forward with sessions delivered by Dr. Etienne Sicard. This session was presented by Mr. Vinay Sharma, and he also assisted in installation of Microwind software. On the first day Mr. Vinay Sharma showed us the different features of the Microwind software and taught us how one can design and simulate the different circuit layout of MOSFET and FinFET, how to analyse the different parameters, and showed us the different technologies that can be implemented in Microwind software.

DAY 2: Recent trends in 5 and 7-nm FinFET cell design

On the second day we discovered the main technological trends, the shift from MOS to FinFET design, performances of basic circuits such as inverters, logic gates, and memories. We learnt how a FinFET technology performance has enabled major advancement in 5G and IA processor performances. The session was illustrated by simple design examples that may serve as a base for hands-on educational projects. On the second day Dr. Etienne Sicard explained us about the current advancement of the FinFET and how the transition of FinFET from MOS happened and also told us about the different technology from 45 nm, 14nm and 7nm. He shared with us about the advantages and disadvantages of the current 5nm and 7nm technology FinFET. He further explained about different role of parameters in functioning of the FinFET.

DAY 3: Future trends in 3-nm Nano-Sheet cell design 

On the last day of the workshop we discovered the innovative Nano-Sheet FET, the successor of MOS and FinFET, and its enhanced performances illustrated on inverters, ring oscillators, logic gates, and memories. The session also included a prospective vision of the ultimate nodes (2nm, 1.5nm) with further progresses such as 3D Nano-Sheet. The session was illustrated by Dr. Etienne Sicard and he explained about the future trends of Nano-sheet design of FET. He illustrated different parameters in which FinFET performance in not up to the mark for technology node less than 5nm. He also explained about the different effects like parasitic capacitance gets affected as we go towards 3nm and below. The workshop concluded with question-answer session on the subject matter related to FinFET and Nano-Sheet FET.