Call For Papers
The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world to exchange innovative ideas on system, board, and device testing with design, manufacturing and field consideration in mind.
Original papers on, but not limited to, the following areas are invited:
• Analog/Mixed-Signal Test
• Automatic Test Generation
• Board Test and Diagnosis
• Boundary Scan Test
• Built-In Self-Test (BIST)
• Defect-Based Test
• Delay and Performance Test
• Dependability and Functional Safety
• Design for Test (DFT)
• Diagnosis and Silicon Debug
• Economic of Test
• Failure Analysis
• Fault Modelling and Simulation
• Fault Tolerance
• GPU Test
• High-Speed I/O Test
• Low-Power IC Test
• Memory Test and Repair
• Test for MEMS and Microfluidic Systems
• Multi-/Many-core Processor Test
• Test for Nanoscale Devices and Emerging Technologies
• On-line Test
• Power/Thermal/Reliability Issues in Test
• Reconfigurable System Test
• Test for Biomedical Circuits and Systems
• RF Test
• Hardware-oriented Security and Trust
• Self-Repair
• Test for Sensors and IoT
• SiP, Stacked, 3D IC Test
• Standards in Test
• Machine Learning in Test
• Test Compression
• Test Quality
• Test Synthesis
• Validation and Verification
• Yield Analysis and Enhancement
• Test for Reversible and Quantum Circuits
All submission should be made electronically in PDF format at https://cmt3.research.microsoft.com/ATS2024/Submission/Index. A submission should contain a complete manuscript within a limit 6 pages in 10-point single-spaced double-column format, an abstract of 50-200 words. The paper must be submitted for blind review process. The template for the paper can be found here. Once a submission is accepted, the author(s) must prepare the final camera-ready manuscript in time for being included in the proceedings, and present the paper at the symposium. In case of any difficulty in submission, authors may contact ats2024.nu@nirmauni.ac.in